Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manuel d'utilisateur télécharger pdf (Page 64)

6 FUNCTIONS

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

6.3.9 Undefined Instruction Exception

When an instruction, which does not exist in the C33 PE instruction set, is executed, an undefined instruction

exception occurs. The object code is loaded into the 16 low-order bits of the IDIR register and is processed similar

to the

nop instruction. In this case, the PC value that is saved into the stack by the exception processing is the

instruction address that follows the undefined instruction executed.

Address TTBR + 12 is used to store the undefined instruction exception vector.

6.3.10 ext Exception

If three or more ext instructions are described sequentially, an ext exception occurs when the third ext

instruction is detected. In this case, the PC value that is saved into the stack by the exception processing is the first

ext instruction address.

Address TTBR + 8 is used to store the

ext exception vector.

When an instruction, which does not support the extension in the ext instruction, follows an ext, the ext

instruction will be executed as a

nop instruction.

1 2 ... 59 60 61 62 63 64 65 66 67 68 69 ... 180 181

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Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manuel d'utilisateur Page 64