Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Spécifications Page 58

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54
List of Hardware Resources used by Middleware
S5U1C330S1S
For 15-bit stereo output
• 16-bit timer 1 ............................................... 9-bit PWM output, L channel
• 16-bit timer 2 ............................................... 9-bit PWM output, R channel
• 16-bit timer 3 ............................................... 6-bit PWM output, L channel
• 16-bit timer 4 ............................................... 6-bit PWM output, R channel
• 16-bit timer 5 ............................................... Sampling trigger generation
• P23 ............................................................. 9-bit PWM output, L channel
• P24 ............................................................. 9-bit PWM output, R channel
• P25 ............................................................. 6-bit PWM output, L channel
• P26 ............................................................. 6-bit PWM output, R channel
For 15-bit mono output
• 16-bit timer 1 ............................................... 9-bit PWM output
• 16-bit timer 3 ............................................... 6-bit PWM output
• 16-bit timer 5 ............................................... Sampling trigger generation
• P23 ............................................................. 9-bit PWM output
• P25 ............................................................. 6-bit PWM output
For 10-bit mono output
• 16-bit timer 1 ............................................... 10-bit PWM output
• 16-bit timer 5 ............................................... Sampling trigger generation
• P23 ............................................................. 10-bit PWM output
S5U1C330J1S
No peripheral circuit is used.
S5U1C330G1S
• 16-bit timer 3 ..................................................... GUI key sampling
S5U1C330R1S
• One 16-bit timer or 8-bit timer channel ............. System clock
S5U1C330M2S
• One serial interface channel and the related port
FLS33
No peripheral circuit is used.
S5U1C330C1S
• K62 ................................................................... Port input interrupt 2
• P32 ................................................................... Port input interrupt 6
• P33 ................................................................... Port input interrupt 7
S5U1C330U1S
• P7 ..................................................................... XINT
• K51 ................................................................... DMAREQ1
• P33 ................................................................... DMAACK1
• One high-speed DMA channel.......................... for DMA transfer
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