Epson SED1278F/D Spécifications télécharger pdf (Page 25)

EPSON 9–23

SED1278

LCD INTERFACE

LCD Drive Voltages

The SED1278 generates segment and common drive

signals using the voltages supplied to pins V

1, V2, V3, V4

and V5. The voltage levels at these pins depend on the

duty cycle of the display. The specifications of these

voltages.

The simplest way of producing these voltages is to use a

resistive dividing network.

Figures 3 and 4 show examples of networks for 1/8, or 1/

11, and 1/16 duty cycles respectively.

SED1278

Figure 3 LCD Drive Voltage Network – 1/8 or 1/11 Duty Cycle

SED1278

Figure 4 LCD Drive Voltage Network – 1/16 Duty Cycle

Notes: 1. V

5 is set using a potentiometer and (VDD–VSS).

2. The power supply to the SED1278 should be bypassed with a capacitor, C

O, of at least 0.1 µF placed as

close to the chip as possible.

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Epson SED1278F/D Spécifications Page 25